FPGA Development and Evaluation Board
Open tender on the Government e-Marketplace.
- Buyer: Department of Higher Education
- Ministry: Ministry of Education
- Category: FPGA Development and Evaluation Board
- Location: Gandhinagar, Gujarat
- Delivery location: Vadodara
- Estimated value: ₹15,00,000
- EMD: ₹30,000
- Bid type: bid
- Published on: 11 Sept 2026
- Closing on: 03 Oct 2026, 05:00 pm IST
About this tender
FPGA Development and Evaluation Board (Q3) — total quantity 14. EMD ₹30,000; ePBG 5% for 26 months. Delivery to 1 consignee location, 45 days delivery. EMD exemption route; ±25% option clause on quantity.
Who can bid, EMD and how to apply
- Who can bid: any seller registered on the Government e-Marketplace for FPGA Development and Evaluation Board.
- EMD: ₹30,000.
- Last date: bids close on 03 Oct 2026, 05:00 pm IST.
- Where to apply: on GeM (bidplus.gem.gov.in). The bid number, documents and buyer details open with a free iBid.Win account.
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