FPGA Development and Evaluation Board
Open tender on the Government e-Marketplace.
- Buyer: Department of Higher Education
- Ministry: Ministry of Education
- Category: FPGA Development and Evaluation Board
- Location: Chathamangalam, Kerala
- Delivery location: Calicut
- Bid type: bid
- Published on: 29 Sept 2026
- Closing on: 20 Oct 2026, 04:00 pm IST
About this tender
FPGA Development and Evaluation Board (Q3) — total quantity 2. Delivery to 1 consignee location, 30 days delivery. ±25% option clause on quantity.
Who can bid, EMD and how to apply
- Who can bid: any seller registered on the Government e-Marketplace for FPGA Development and Evaluation Board.
- EMD: as declared on GeM.
- Last date: bids close on 20 Oct 2026, 04:00 pm IST.
- Where to apply: on GeM (bidplus.gem.gov.in). The bid number, documents and buyer details open with a free iBid.Win account.
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